RE: chipidea udc: ctrl traffic on endpoint 8

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>                 }
> 
>                 if (hwep->type != USB_ENDPOINT_XFER_CONTROL ||
> +                   (i >= ci->hw_ep_max / 2) ||
>                     !hw_test_and_clear_setup_status(ci, i))
>                         continue;
> 
> 
> I think the reason why we see this more likely on our system, is that it
> is a
> running an realtime kernel. Therefor the irq-routine running as threaded
> interrupt could be delayed and read the SETUPTSTAT bits in a different
> order.
> 

OK, I understand your situation.

Current code prime setup status stage too early, it is before you handling
setup packet (for your case, it is ep0in), so after host receives the data,
it sends ep0out for next setup packet, at that time, the SETUPTSTAT will
be set.

Peter

> > PS : the code for handling ctrl endpoint is a bit messy. We should
> > split isr_tr_complete_handler in isr_tr_complete_handler and
> > isr_tr_setup_handler.
> 
> Ack.
> 
> Thanks,
> Michael
> 
> 
> --
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> 

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