On Wed, Mar 30, 2022 at 05:16:42PM +0300, Andy Shevchenko wrote:
> On Wed, Mar 30, 2022 at 03:20:36PM +0200, Miquel Raynal wrote:
> > From: Phil Edworthy <phil.edworthy@xxxxxxxxxxx>
> One comment below, after addressing,
Missed comment:
> > + /* Manually stop the Rx DMA transfer when acting as flow controller */
> > + if (up->dma && up->dma->rx_running && rx_timeout && quirks & DW_UART_QUIRK_IS_DMA_FC) {
This is an interrupt context and I think it's better that we quit as earlier as
possible, meaning the quirk check should be first (i.o.w. from particular to
general when && is in use).
> > + status = p->serial_in(p, UART_LSR);
> > + if (status & (UART_LSR_DR | UART_LSR_BI)) {
> > + writel(0, p->membase + RZN1_UART_RDMACR);
> > + writel(1, p->membase + DW_UART_DMASA);
> > + }
> > + }
--
With Best Regards,
Andy Shevchenko
