> On March 29, 2019 at 8:05 AM Dirk Behme <dirk.behme@xxxxxxxxxxxx> wrote: > > > Hi Geert, > > On 28.03.2019 12:30, Dirk Behme wrote: > > On 28.03.2019 11:16, Dirk Behme wrote: > * Testing the patch [5] > > - int shift = min(-8, max(7, deviation / 2)); > + int shift = clamp(deviation / 2, -8, 7); > > does *not* fix our issue. Or in other words: Testing was *not* successful. > > * However, from review point of view we think that it fixes a serious > bug. So maybe it should be applied, anyhow? It should. > > * Using strace we managed to get some more information about the usage > of the serial port [6]. With this, we are talking about 57600 and not 115200 > > * Switching to dev_info() [7] as requested above we get > > [ 0.553256] e6560000.serial: ttySC3 at MMIO 0xe6560000 (irq = 41, > base_baud = 0) is a hscif > [ 161.418527] sh-sci e6560000.serial: BRG: 9600+0 bps using DL 1462 SR 19 > [ 161.418543] sh-sci e6560000.serial: Using clk s3d1 for 9600+0 bps > [ 161.418813] sh-sci e6560000.serial: BRG: 57600-5 bps using DL 463 SR 10 > [ 161.418824] sh-sci e6560000.serial: Using clk s3d1 for 57600-5 bps > > * We are talking about a custom r8a7796 board Reviewing the code, I have found another potential issue: the SRR (sampling rate) value is not validated; only values from 7 to 31 are permissible, according to the datasheet. The values in the debug output above would be fine, though. So, for clarification: Is there a problem at 9600/57600 bps, or does it only occur at 115200 bps? CU Uli
