On Sun, Nov 07, 2021 at 10:29:37PM +0200, Sam Protsenko wrote:
> The s3c2410wdt_mask_and_disable_reset() function content is bound to be
> changed further. Prepare it for upcoming changes by splitting into
> separate "mask reset" and "disable reset" functions. But keep
> s3c2410wdt_mask_and_disable_reset() function present as a facade.
>
> This commit doesn't bring any functional change to existing devices, but
> merely provides an infrastructure for upcoming chips support.
>
> Signed-off-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxx>
Reviewed-by: Guenter Roeck <linux@xxxxxxxxxxxx>
> ---
> Changes in v3:
> - Added R-b tag by Krzysztof Kozlowski
>
> Changes in v2:
> - (none): it's a new patch
>
> drivers/watchdog/s3c2410_wdt.c | 54 ++++++++++++++++++++++------------
> 1 file changed, 35 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
> index 2cc4923a98a5..4ac0a30e835e 100644
> --- a/drivers/watchdog/s3c2410_wdt.c
> +++ b/drivers/watchdog/s3c2410_wdt.c
> @@ -202,37 +202,53 @@ static inline struct s3c2410_wdt *freq_to_wdt(struct notifier_block *nb)
> return container_of(nb, struct s3c2410_wdt, freq_transition);
> }
>
> -static int s3c2410wdt_mask_and_disable_reset(struct s3c2410_wdt *wdt, bool mask)
> +static int s3c2410wdt_disable_wdt_reset(struct s3c2410_wdt *wdt, bool mask)
> {
> + const u32 mask_val = BIT(wdt->drv_data->mask_bit);
> + const u32 val = mask ? mask_val : 0;
> int ret;
> - u32 mask_val = 1 << wdt->drv_data->mask_bit;
> - u32 val = 0;
>
> - /* No need to do anything if no PMU CONFIG needed */
> - if (!(wdt->drv_data->quirks & QUIRK_HAS_PMU_CONFIG))
> - return 0;
> + ret = regmap_update_bits(wdt->pmureg, wdt->drv_data->disable_reg,
> + mask_val, val);
> + if (ret < 0)
> + dev_err(wdt->dev, "failed to update reg(%d)\n", ret);
>
> - if (mask)
> - val = mask_val;
> + return ret;
> +}
>
> - if (wdt->drv_data->quirks & QUIRK_HAS_PMU_AUTO_DISABLE) {
> - ret = regmap_update_bits(wdt->pmureg,
> - wdt->drv_data->disable_reg, mask_val,
> - val);
> - if (ret < 0)
> - goto error;
> - }
> +static int s3c2410wdt_mask_wdt_reset(struct s3c2410_wdt *wdt, bool mask)
> +{
> + const u32 mask_val = BIT(wdt->drv_data->mask_bit);
> + const u32 val = mask ? mask_val : 0;
> + int ret;
>
> - ret = regmap_update_bits(wdt->pmureg,
> - wdt->drv_data->mask_reset_reg,
> - mask_val, val);
> - error:
> + ret = regmap_update_bits(wdt->pmureg, wdt->drv_data->mask_reset_reg,
> + mask_val, val);
> if (ret < 0)
> dev_err(wdt->dev, "failed to update reg(%d)\n", ret);
>
> return ret;
> }
>
> +static int s3c2410wdt_mask_and_disable_reset(struct s3c2410_wdt *wdt, bool mask)
> +{
> + int ret;
> +
> + if (wdt->drv_data->quirks & QUIRK_HAS_PMU_AUTO_DISABLE) {
> + ret = s3c2410wdt_disable_wdt_reset(wdt, mask);
> + if (ret < 0)
> + return ret;
> + }
> +
> + if (wdt->drv_data->quirks & QUIRK_HAS_PMU_CONFIG) {
> + ret = s3c2410wdt_mask_wdt_reset(wdt, mask);
> + if (ret < 0)
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> static int s3c2410wdt_keepalive(struct watchdog_device *wdd)
> {
> struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);
> --
> 2.30.2
>
