On Sun, Nov 07, 2021 at 10:29:38PM +0200, Sam Protsenko wrote:
> On new Exynos chips (like Exynos850) the MASK_WDT_RESET_REQUEST register
> is replaced with CLUSTERx_NONCPU_INT_EN, and its mask bit value meaning
> was reversed: for new register the bit value "1" means "Interrupt
> enabled", while for MASK_WDT_RESET_REQUEST register "1" means "Mask the
> interrupt" (i.e. "Interrupt disabled").
>
> Introduce "mask_reset_inv" boolean field in driver data structure; when
> that field is "true", mask register handling function will invert the
> value before setting it to the register.
>
> This commit doesn't bring any functional change to existing devices, but
> merely provides an infrastructure for upcoming chips support.
>
> Signed-off-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxx>
Reviewed-by: Guenter Roeck <linux@xxxxxxxxxxxx>
> ---
> Changes in v3:
> - Added R-b tag by Krzysztof Kozlowski
>
> Changes in v2:
> - (none): it's a new patch
>
> drivers/watchdog/s3c2410_wdt.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
> index 4ac0a30e835e..2a61b6ea5602 100644
> --- a/drivers/watchdog/s3c2410_wdt.c
> +++ b/drivers/watchdog/s3c2410_wdt.c
> @@ -92,6 +92,7 @@ MODULE_PARM_DESC(soft_noboot, "Watchdog action, set to 1 to ignore reboots, 0 to
> * timer reset functionality.
> * @mask_reset_reg: Offset in pmureg for the register that masks the watchdog
> * timer reset functionality.
> + * @mask_reset_inv: If set, mask_reset_reg value will have inverted meaning.
> * @mask_bit: Bit number for the watchdog timer in the disable register and the
> * mask reset register.
> * @rst_stat_reg: Offset in pmureg for the register that has the reset status.
> @@ -103,6 +104,7 @@ MODULE_PARM_DESC(soft_noboot, "Watchdog action, set to 1 to ignore reboots, 0 to
> struct s3c2410_wdt_variant {
> int disable_reg;
> int mask_reset_reg;
> + bool mask_reset_inv;
> int mask_bit;
> int rst_stat_reg;
> int rst_stat_bit;
> @@ -219,7 +221,8 @@ static int s3c2410wdt_disable_wdt_reset(struct s3c2410_wdt *wdt, bool mask)
> static int s3c2410wdt_mask_wdt_reset(struct s3c2410_wdt *wdt, bool mask)
> {
> const u32 mask_val = BIT(wdt->drv_data->mask_bit);
> - const u32 val = mask ? mask_val : 0;
> + const bool val_inv = wdt->drv_data->mask_reset_inv;
> + const u32 val = (mask ^ val_inv) ? mask_val : 0;
> int ret;
>
> ret = regmap_update_bits(wdt->pmureg, wdt->drv_data->mask_reset_reg,
> --
> 2.30.2
>
