On 10/28/13 08:15, Olof Johansson wrote:
On Sun, Oct 27, 2013 at 10:36 PM, Jingoo Han<jg1.han@xxxxxxxxxxx> wrote:
On Monday, October 28, 2013 1:52 PM, Olof Johansson wrote:
On Wed, Sep 4, 2013 at 11:08 PM, Jingoo Han<jg1.han@xxxxxxxxxxx> wrote:
Disable PCIe for SD5v1 board, because there is no PCIe slot
on SD5v1 board.
Signed-off-by: Jingoo Han<jg1.han@xxxxxxxxxxx>
---
Tested on SD5v1 board.
arch/arm/boot/dts/exynos5440-sd5v1.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5440-sd5v1.dts b/arch/arm/boot/dts/exynos5440-sd5v1.dts
index 5b22508..78a239d 100644
--- a/arch/arm/boot/dts/exynos5440-sd5v1.dts
+++ b/arch/arm/boot/dts/exynos5440-sd5v1.dts
@@ -36,4 +36,11 @@
status = "disabled";
};
+ pcie@290000 {
+ status = "disabled";
+ };
+
+ pcie@2a0000 {
+ status = "disabled";
+ };
};
Usually IP blocks like these are always left disabled in the dtsi, and
explicitly _enabled_ in the DTS on boards that make use of that part
of the chip.
So the real solution here should be to move the disabling to the 5440
.dtsi instead.
OK, right.
Thank you for your guidance.
Then, do you mean the following?
If it is right, I will send the v2 patch.
Yes, exactly!
Hmm...I thought both ways (#1 disabling something in soc dt, enabling in
board dt if required, #2 enabling in soc dt, disabling in board dt if
required) are possible but I have no strong objection with your
suggestion. In addition, just one way is more clear to us :)
OK, I will keep the way for Samsung stuff.
Thanks,
Kukjin
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