On 16/08/18 12:53 PM, Kit Chow wrote: > > > On 08/16/2018 10:21 AM, Logan Gunthorpe wrote: >> >> On 16/08/18 11:16 AM, Kit Chow wrote: >>> I only have access to intel hosts for testing (and possibly an AMD >>> host currently collecting dust) and am not sure how to go about getting >>> the proper test coverage for other architectures. >> Well, I thought you were only changing the Intel IOMMU implementation... >> So testing on Intel hardware seems fine to me. > For the ntb change, I wasn't sure if there was some other arch where > ntb_async_tx_submit would work ok with the pci bar address but > would break with the dma map (assuming map_resource has been implemented). > If its all x86 at the moment, I guess I'm good to go. Please confirm. I expect lots of arches have issues with dma_map_resource(), it's pretty new and if it didn't work correctly on x86 I imagine many other arches are wrong too. I an arch is doesn't work, someone will have to fix that arches Iommu implementation. But using dma_map_resource() in ntb_transport is definitely correct compared to what was done before. Logan
