On 08/16/2018 10:21 AM, Logan Gunthorpe wrote:
On 16/08/18 11:16 AM, Kit Chow wrote:
I only have access to intel hosts for testing (and possibly an AMD
host currently collecting dust) and am not sure how to go about getting
the proper test coverage for other architectures.
Well, I thought you were only changing the Intel IOMMU implementation...
So testing on Intel hardware seems fine to me.
For the ntb change, I wasn't sure if there was some other arch where
ntb_async_tx_submit would work ok with the pci bar address but
would break with the dma map (assuming map_resource has been implemented).
If its all x86 at the moment, I guess I'm good to go. Please confirm.
Thanks
Kit
Any suggestions? Do you anticipate any issues with dma mapping the pci bar
address in ntb_async_tx_submit on non-x86 archs? Do you or know of folks
who have ntb test setups with non-x86 hosts who might be able to help?
I expect other IOMMUs will need to be updated to properly support
dma_map_resource but that will probably need to be done on a case by
case basis as the need arises. Unfortunately it seems the work to add
dma_map_resource() didn't really consider that the IOMMUs had to have
proper support and probably should have errored out instead of just
passing along the physical address if the IOMMU didn't have support.
I don't know of anyone with an NTB setup on anything but x86 at the moment.
Logan
