Re: [PATCH for-linus v3 1/2] PCI: Honor Max Link Speed when determining supported speeds

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Hello,

[...]
> > > > Thanks for adding this extra information.
> > > > 
> > > > I'd also add reference to r6.2 section 7.5.3 which states those registers 
> > > > are required for RPs, Switch Ports, Bridges, and Endpoints _that are not 
> > > > RCiEPs_. My reading is that implies they're not required from RCiEPs.
> > > 
> > > Let me know how you would like to update the commit message.  I will do it
> > > directly on the branch.
> > 
> > FWIW, I edited the commit message like this on my local branch:
> > 
> > -Endpoints in particular, so it does occur in practice.
> > +Endpoints in particular, so it does occur in practice.  (The Link
> > +Capabilities Register is optional on RCiEPs per PCIe r6.2 sec 7.5.3.)
> > 
> > In other words, I just added the sentence in parentheses.
> > But maybe Ilpo has another wording preference... :)
> 
> Your wording is good summary for the real substance that is the spec 
> itself. :-)

Updated.  Thank you both!

	Krzysztof




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