In response to v2, Ilpo gave a heads-up that the first patch in the series was problematic: A zero Max Link Speed is common in particular on Root Complex Integrated Endpoints, so there's no reason to emit a warning or assume 2.5 GT/s. In the interest of resolving the regression before the holidays, I'm respinning already after two days and I'm reverting back to my original proposal to use 0 as lowest bit in the GENMASK() macro. I've amended the commit message with an explanation to address Ilpo's concern that the 0 may cause confusion because Supported Link Speeds ends at bit 1. So patch [1/2] in this series is identical to what's already queued up on pci.git/for-linus, save for the extended commit message. And patch [2/2] is unchanged vis-�is v2. Link to v2: https://lore.kernel.org/all/cover.1734257330.git.lukas@xxxxxxxxx/ Lukas Wunner (2): PCI: Honor Max Link Speed when determining supported speeds PCI/bwctrl: Enable only if more than one speed is supported drivers/pci/pci.c | 6 ++++-- drivers/pci/pcie/portdrv.c | 4 +++- 2 files changed, 7 insertions(+), 3 deletions(-) -- 2.43.0
