Hello, > > One user-visible issue addressed here is an incorrect value in the sysfs > > attribute "max_link_speed". > > > > But the main motivation is a boot hang reported by Niklas: Intel JHL7540 > > "Titan Ridge 2018" Thunderbolt controllers supports 2.5-8 GT/s speeds, > > but indicate 2.5 GT/s as maximum. Ilpo recalls seeing this on more > > devices. It can be explained by the controller's Downstream Ports > > supporting 8 GT/s if an Endpoint is attached, but limiting to 2.5 GT/s > > if the port interfaces to a PCIe Adapter, in accordance with USB4 v2 > > sec 11.2.1: > > > > "This section defines the functionality of an Internal PCIe Port that > > interfaces to a PCIe Adapter. [...] > > The Logical sub-block shall update the PCIe configuration registers > > with the following characteristics: [...] > > Max Link Speed field in the Link Capabilities Register set to 0001b > > (data rate of 2.5 GT/s only). > > Note: These settings do not represent actual throughput. Throughput > > is implementation specific and based on the USB4 Fabric performance." > > > > The present commit is not sufficient on its own to fix Niklas' boot hang, > > but it is a prerequisite: A subsequent commit will fix the boot hang by > > enabling bandwidth control only if more than one speed is supported. > > > > The GENMASK() macro used herein specifies 0 as lowest bit, even though > > the Supported Link Speeds Vector ends at bit 1. This is done on purpose > > to avoid a GENMASK(0, 1) macro if Max Link Speed is zero. That macro > > would be invalid as the lowest bit is greater than the highest bit. > > Ilpo has witnessed a zero Max Link Speed on Root Complex Integrated > > Endpoints in particular, so it does occur in practice. > > Thanks for adding this extra information. > > I'd also add reference to r6.2 section 7.5.3 which states those registers > are required for RPs, Switch Ports, Bridges, and Endpoints _that are not > RCiEPs_. My reading is that implies they're not required from RCiEPs. Let me know how you would like to update the commit message. I will do it directly on the branch. Thank you! Krzysztof
