From: Yinghai Lu <yinghai@xxxxxxxxxx> Date: Tue, 29 May 2012 13:46:03 -0700 > On Tue, May 29, 2012 at 12:03 PM, H. Peter Anvin <hpa@xxxxxxxxx> wrote: >> On 05/29/2012 11:17 AM, Yinghai Lu wrote: >>> so during allocating, could have allocated above 64k address to non >>> 32bit bridge. >>> >>> but x86 is ok, because ioport.end always set to 0xffff. >>> other arches with IO_SPACE_LIMIT with 0xffffffff or >>> 0xffffffffffffffffUL may have problem. >> >> The latter is nonsense, the PCI-side address space is only 32 bits wide. >> > maybe they have unified io include ioport and mem io? The resource values stored are the actual physical I/O addresses on some platforms. Sparc, for example, falls into this category. Therefore ~0UL is the only feasible limit for them. We have to distinguish explicitly when we are operating upon actual PCI bus view addresses vs. the values that end up in the resources. They are entirely different, and have completely different address ranges. -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
