On Tue, May 29, 2012 at 10:57 AM, H. Peter Anvin <hpa@xxxxxxxxx> wrote: > On 05/29/2012 10:55 AM, Yinghai Lu wrote: >> >> x86 are using 16bits. >> >> some others use 32 bits. >> #define IO_SPACE_LIMIT 0xffffffff >> >> ia64 and sparc are using 64bits. >> #define IO_SPACE_LIMIT 0xffffffffffffffffUL >> >> but pci only support 16bits and 32bits. >> >> maybe later we can add >> PCI_MAX_RESOURCE_16 >> >> to handle 16bits and 32bit io ports. >> > > Shouldn't this be dealt by root port apertures? > pci bridge could support 16bits and 32bits io port. but we did not record if 32bits is supported. so during allocating, could have allocated above 64k address to non 32bit bridge. but x86 is ok, because ioport.end always set to 0xffff. other arches with IO_SPACE_LIMIT with 0xffffffff or 0xffffffffffffffffUL may have problem. Yinghai -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
