On Tue, May 29, 2012 at 12:03 PM, H. Peter Anvin <hpa@xxxxxxxxx> wrote: > On 05/29/2012 11:17 AM, Yinghai Lu wrote: >> >> pci bridge could support 16bits and 32bits io port. >> but we did not record if 32bits is supported. >> > > Okay, so this is the actual problem, no? their fw could not need kernel help to allocate io ports, or they are only use device that support 32bit ioport. > >> so during allocating, could have allocated above 64k address to non >> 32bit bridge. >> >> but x86 is ok, because ioport.end always set to 0xffff. >> other arches with IO_SPACE_LIMIT with 0xffffffff or >> 0xffffffffffffffffUL may have problem. > > The latter is nonsense, the PCI-side address space is only 32 bits wide. > maybe they have unified io include ioport and mem io? Yinghai -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
