On Fri, Apr 27, 2012 at 3:27 AM, Richard Yang
<weiyang@xxxxxxxxxxxxxxxxxx> wrote:
> All,
>
> I draw a picture about the physical layout on a part of the pci system.
>
> Each block represent a bridge or a device.
> Am I correct?
>
> +-----------------------------+
> | |
> | |
> | Bus#2 |
> | ------------------ |
> | |
> | |
> | |
> | +-------------+
> | |DownStream |02:00.0 pci_dev
> +---------------+-------+-----+
> | Bus#3
> ---------------+------------------------------------------+---
> | |
> | |
> +---------------+-------+-----+ +---------------+----+--+-----+
> | |UpStream |03:00.0 | |UpStream |03:01.0
> | +-------------+ | +-------------+ a normal device
> | | | |
> | | | |
> | Bus#4 | | |
> | ------------------- | | |
> | +----------+ | |
> | |DownStream| | |
> +-----------------------+-----+ +-----------------------------+
> |
> | Bus#5
> ------------+------------
I assume your question relates to the Stratus ftServer topology. If
so, the lspci details might clarify things.
In that system, my understanding is that 03:01.0 is a downstream port,
not an upstream port.
I think your picture is slightly misleading because PCIe links are not
buses; they're point-to-point links between two devices. You've drawn
#3 and #5 as buses that can have several devices on them, which is not
really the case. The link from a downstream port should lead to
exactly one device.
That's one thing that's strange in the ftServer topology: apparently
there are *two* devices on bus 03: the 03:00.0 upstream port and the
03:01.0 downstream port. I think 03:00.0 is the upstream port of a
PCIe switch, which is perfectly normal. My understanding is that
03:01.0 is another *downstream* port that leads to several more
devices (USB, NIC, etc).
Bjorn
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