On Fri, Apr 27, 2012 at 8:10 AM, Jiang Liu <liuj97@xxxxxxxxx> wrote:
> For PCI, there's no internal bus Bus#4 in the left bottom device.
Yes, there is. The left bottom box is a PCIe switch with upstream
port 03:00.0. The upstream port's secondary bus is 04, which is the
switch's internal bus. The switch's downstream ports would be, for
example, 04:00.0, 04:01.0, 04:02.0, etc (other numberings are
possible). If the box labelled "Downstream" is 04:00.0, its secondary
bus would be 05.
As I mentioned before, I think the bus 05 line is misleading, because
it's drawn as a bus where multiple devices could be attached. It
should instead be a point-to-point link to a single device. (Except
in this Stratus system, which seems broken because it *does* have two
devices attached to the same downstream port.)
> On 04/27/2012 05:27 PM, Richard Yang wrote:
>> All,
>>
>> I draw a picture about the physical layout on a part of the pci system.
>>
>> Each block represent a bridge or a device.
>> Am I correct?
>>
>> +-----------------------------+
>> | |
>> | |
>> | Bus#2 |
>> | ------------------ |
>> | |
>> | |
>> | |
>> | +-------------+
>> | |DownStream |02:00.0 pci_dev
>> +---------------+-------+-----+
>> | Bus#3
>> ---------------+------------------------------------------+---
>> | |
>> | |
>> +---------------+-------+-----+ +---------------+----+--+-----+
>> | |UpStream |03:00.0 | |UpStream |03:01.0
>> | +-------------+ | +-------------+ a normal device
>> | | | |
>> | | | |
>> | Bus#4 | | |
>> | ------------------- | | |
>> | +----------+ | |
>> | |DownStream| | |
>> +-----------------------+-----+ +-----------------------------+
>> |
>> | Bus#5
>> ------------+------------
>>
>>
>
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