RE: More LDP stuff

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> -----Original Message-----
> From: linux-omap-owner@xxxxxxxxxxxxxxx [mailto:linux-omap-
> owner@xxxxxxxxxxxxxxx] On Behalf Of Russell King - ARM Linux
> Sent: Thursday, January 06, 2011 9:07 PM
> To: linux-omap@xxxxxxxxxxxxxxx
> Subject: More LDP stuff
>
> During boot, apart from the watchdog issue, I'm also seeing:
>
> Clocking rate (Crystal/Core/MPU): 26.0/266/500 MHz
> Reprogramming SDRC clock to 266000000 Hz
> dpll3_m2_clk rate change failed: -22
>
> Is that something to be concerned about?
>
DDR is not getting reconfigured and needs to rely on bootloder
settings. Should be ok because DVFS is not yet supported yet.


> ads7846 spi1.0: unable to get regulator: -19
>
> Is something missing from the ldp support code to declare this
> regulator?
Am not sure what is connected to SPI on LDP. But mostly
not an important peripheral.

>
> mmcblk0: retrying using single block read
> (repeated many times)
>
> Is the OMAP HSMMC driver really unable to handle multi-block read
> requests, or is something missing on the LDP to make it work?
Not sure.

Regards
Santosh
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