During boot, apart from the watchdog issue, I'm also seeing: Clocking rate (Crystal/Core/MPU): 26.0/266/500 MHz Reprogramming SDRC clock to 266000000 Hz dpll3_m2_clk rate change failed: -22 Is that something to be concerned about? ads7846 spi1.0: unable to get regulator: -19 Is something missing from the ldp support code to declare this regulator? mmcblk0: retrying using single block read (repeated many times) Is the OMAP HSMMC driver really unable to handle multi-block read requests, or is something missing on the LDP to make it work? -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
