Re: [PATCH 08/17] ARM: dts: Add missing hsi node for omap4

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Hi,

On Mon, Aug 28, 2017 at 02:19:09PM -0700, Tony Lindgren wrote:
> On omap4 we're missing the hsi node with it's related "ti,hwmods"
> property that the SoC interconnect code needs.
> 
> Note that this will only show up as a bug with "doesn't have
> mpu register target base" boot errors when the legacy platform
> data is removed.
> 
> Let's also update the binding accrodingly while at it.
> 
> Cc: Sebastian Reichel <sre@xxxxxxxxxx>
> Signed-off-by: Tony Lindgren <tony@xxxxxxxxxxx>
> ---
>  Documentation/devicetree/bindings/hsi/omap-ssi.txt | 6 +++++-
>  arch/arm/boot/dts/omap4.dtsi                       | 9 +++++++++
>  2 files changed, 14 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/hsi/omap-ssi.txt b/Documentation/devicetree/bindings/hsi/omap-ssi.txt
> --- a/Documentation/devicetree/bindings/hsi/omap-ssi.txt
> +++ b/Documentation/devicetree/bindings/hsi/omap-ssi.txt
> @@ -4,7 +4,7 @@ OMAP Synchronous Serial Interface (SSI) controller implements a legacy
>  variant of MIPI's High Speed Synchronous Serial Interface (HSI).
>  
>  Required properties:
> -- compatible:		Should include "ti,omap3-ssi".
> +- compatible:		Should include "ti,omap3-ssi" or "ti,omap4-hsi"
>  - reg-names:		Contains the values "sys" and "gdd" (in this order).
>  - reg:			Contains a matching register specifier for each entry
>  			in reg-names.
> @@ -38,6 +38,10 @@ Required Port sub-node properties:
>  			property. If it's missing the port will not be
>  			enabled.
>  
> +Optional properties:
> +- ti,hwmods:		Shall contain TI interconnect module name if needed
> +			by the SoC
> +
>  Example for Nokia N900:
>  
>  ssi-controller@48058000 {
> diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
> --- a/arch/arm/boot/dts/omap4.dtsi
> +++ b/arch/arm/boot/dts/omap4.dtsi
> @@ -632,6 +632,15 @@
>  			dma-names = "tx", "rx";
>  		};
>  
> +		hsi: hsi@4a058000 {
> +			compatible = "ti,omap4-hsi";
> +			reg = <0x4a058000 0x4000>;
> +			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
> +			ti,hwmods = "hsi";
> +		};
> +

This does not follow the binding, which expects one subnode per
port and splits memory areas + interrupts accordingly. Fortunately
HSI is properly documented in the public OMAP4 TRM (in opposit to
SSI, which is missing completly in OMAP3 TRM). I think the node
should look like this:

hsi: hsi@4a058000 {
    compatible = "ti,omap4-hsi";
    ti,hwmods = "hsi";

    reg = <0x4a058000 0x5000>,
          <0x4a058000 0x1000>;
    reg-names = "sys", "gdd";

    clocks = <&hsi_fck>;
    clock-names = "hsi_fck";

    interrupts = <71>;
    interrupt-names = "gdd_mpu";

    #address-cells = <1>;
    #size-cells = <1>;
    ranges;

    hsi_port1: hsi-port@4a05a000 {
        compatible = "ti,omap4-hsi-port";

        reg = <0x4a05a000 0x800>,
              <0x4a05a800 0x800>;
        reg-names = "tx", "rx";

        interrupt-parent = <&intc>;
        interrupts = <67>;
    };

    hsi_port2: hsi-port@4a05b000 {
        compatible = "ti,omap4-hsi-port";

        reg = <0x4a05b000 0x800>,
              <0x4a05b800 0x800>;
        reg-names = "tx", "rx";

        interrupt-parent = <&intc>;
        interrupts = <68>;
    };
};

-- Sebastian

>  		mmu_dsp: mmu@4a066000 {
>  			compatible = "ti,omap4-iommu";
>  			reg = <0x4a066000 0x100>;
> -- 
> 2.14.1

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