>-----Original Message----- >From: twebb [mailto:taliaferro62@xxxxxxxxx] >Sent: Thursday, April 16, 2009 9:53 AM >To: Pandita, Vikram >Cc: Gupta, Ajay Kumar; linux-omap@xxxxxxxxxxxxxxx Mailing List >Subject: Re: ehci problem on OMAP35xx > >Yes. It's not described in the datasheet but SMSC has confirmed the >part will work in the mode where the clock is driven from OMAP to >xcvr. the first thing that has to successfully happen over ULPI is the ULPI reset. OMAP will issue a RESET over ULPI as a TX CMD of 0x84 0x69. When this reset command is sent over ULPI, PHY state m/c should have locked on to the 60mhz clock. That's the kind of hack you are seeing in ehci-omap.c file today, though Not the right place to put the hack considering it's a generic driver. > >Other suggestions? One thing we're now seeing is very inconsistent >readback of transceiver registers when accessed via INSNREG05_ULPI. >Even readback of RO registers (like Vendor ID High) doesn't work >consistently. > >twebb -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
