Kishon
On Tue, 23 Feb 2016, Kishon Vijay Abraham I wrote:
> On Monday 22 February 2016 03:25 PM, Kishon Vijay Abraham I wrote:
> > On Monday 22 February 2016 12:01 PM, Paul Walmsley wrote:
> >> On Mon, 22 Feb 2016, Kishon Vijay Abraham I wrote:
> >>> On Thursday 18 February 2016 07:51 PM, Sekhar Nori wrote:
> >>>> On Friday 12 February 2016 10:50 PM, Suman Anna wrote:
> >>>>> Will you be following up with above suggestion since Kishon is gonna be out?
> >>>>
> >>>> Alright, noticed this action for me :) Went through the thread, and
> >>>> looks like this is what we want to see?
> >>>>
> >>>> Thanks,
> >>>> Sekhar
> >>>>
> >>>> ---8<---
> >>>> From e3ba368f2235e1bf38a22ba8ea4e5c12aaafda19 Mon Sep 17 00:00:00 2001
> >>>> Message-Id: <e3ba368f2235e1bf38a22ba8ea4e5c12aaafda19.1455803758.git.nsekhar@xxxxxx>
> >>>> From: Sekhar Nori <nsekhar@xxxxxx>
> >>>> Date: Thu, 18 Feb 2016 16:49:56 +0530
> >>>> Subject: [PATCH 1/1] ARM: DRA7: hwmod: Add custom reset handler for PCIeSS
> >>>>
> >>>> Add a custom reset handler for DRA7x PCIeSS. This
> >>>> handler is required to deassert PCIe hardreset lines
> >>>> after they have been asserted.
> >>>>
> >>>> This enables the PCIe driver to access registers after
> >>>> PCIeSS has been runtime enabled without having to
> >>>> deassert hardreset lines itself.
> >>>>
> >>>> With this patch applied, used lspci to make sure
> >>>> connected PCIe device enumerates on DRA74x and DRA72x
> >>>> EVMs.
> >>>>
> >>>> Signed-off-by: Sekhar Nori <nsekhar@xxxxxx>
> >>>> ---
> >>>> Applies to tag for-v4.6/omap-hwmod-a of Paul W's tree.
> >>>>
> >>>> arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 23 +++++++++++++++++++++++
> >>>> 1 file changed, 23 insertions(+)
> >>>>
> >>>> diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> >>>> index b61355e2a771..252b74633e31 100644
> >>>> --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> >>>> +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> >>>> @@ -1526,8 +1526,31 @@ static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
> >>>> *
> >>>> */
> >>>>
> >>>> +/*
> >>>> + * As noted in documentation for _reset() in omap_hwmod.c, the stock reset
> >>>> + * functionality of OMAP HWMOD layer does not deassert the hardreset lines
> >>>> + * associated with an IP automatically leaving the driver to handle that
> >>>> + * by itself. This does not work for PCIeSS which needs the reset lines
> >>>> + * deasserted for the driver to start accessing registers.
> >>>> + *
> >>>> + * We use a PCIeSS HWMOD class specific reset handler to deassert the hardreset
> >>>> + * lines after asserting them.
> >>>> + */
> >>>> +static int dra7xx_pciess_reset(struct omap_hwmod *oh)
> >>>> +{
> >>>> + int i;
> >>>> +
> >>>> + for (i = 0; i < oh->rst_lines_cnt; i++) {
> >>>> + omap_hwmod_assert_hardreset(oh, oh->rst_lines[i].name);
> >>>> + omap_hwmod_deassert_hardreset(oh, oh->rst_lines[i].name);
> >>>> + }
> >>>> +
> >>>> + return 0;
> >>>> +}
> >>>> +
> >>>> static struct omap_hwmod_class dra7xx_pciess_hwmod_class = {
> >>>> .name = "pcie",
> >>>> + .reset = dra7xx_pciess_reset,
> >>>> };
> >>>
> >>> Thanks for the patch.
> >>
> >> Could you please test the bind/unbind functionality just to make sure it
> >> works?
> >
> > The pci-dra7xx driver neither expose the bind/unbind sysfs entry nor can be
> > built as module.
> >
> > However I hacked the pci-dra7xx driver to be built as module [and reverted
> > Commit 5de85b9d57ab ("PM / runtime: Re-init runtime PM states at probe error
> > and driver unbind")] and I don't see an abort when the PCI registers are
> > accessed after rmmod/modprobe cycle (that was the issue that Sekhar's patch
> > tried to solve). However PCI as such doesn't work after rmmod/modprobe cycle
> > [1], but this is a different issue most likely in PCIe core and has to debugged.
> >
> > In summary, there are other issues in PCI across rmmod/modprobe cycle but the
> > reset of pci-dra7xx happens fine with this patch.
>
> Do you expect any other testing from me?
No I think that's sufficient for the time being, thanks - but, two
questions:
1. Can I add your Tested-by: ?
2. Are you going to follow up with these PCIe core issues with the PCIe
core developers?
- Paul
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