RE: tHigh tLow discussion (was [pacth] I2C bug fixes for L-O and L-Z)

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> I am not entirely sure about the basis of Eero's equation:
>
> scll = (scl+3) * iclk
> sclh = (scl+9) * iclk

No, no:

Exactly the opposite,
+                       fsscll = internal_clk / (dev->speed * 2) - 3;
+                       fssclh = internal_clk / (dev->speed * 2) - 9;

means a longer period for scll. (and shorter for sclh)

- Eero
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