On Mon, 2009-02-16 at 15:19 +0100, ext Woodruff, Richard wrote: > Hi, > > > Could you please also address the question of the load on the SCL line? > > Are you talking about rise/fall time? > Sorry for being unclear; The I2C standard addresses also rise/fall times, but more interesting, the tLow and tHigh (and a number of other parameters). It seems with the open source drivers, that somehow they're after a "balanced I2C clock" meaning tLow == tHigh, which is very, very dangerous. If you look at the I2C standard, you see that actually tLow is about twice as large as tHigh! (that is closer to truth than the balanced clock) So I'm talking about the registers I2C_SCLL and I2C_SCLH. If they have the TRM or "open source" values, then it's very likely the I2C clock is out of standard. The SCLL (tLow) is in danger for being far too short. The I2C chip manufacturers consider the I2C standard as basis for any proper operation. They're not after "balanced" I2C clock. So I wish I could get some comments on the SCLL and SCLH, TRM, open source and obeying I2C standard. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
