RE: [pacth] I2C bug fixes for L-O and L-Z

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Could you please also address the question of the load on the SCL line?

In my understanding, many boards are using the experimental values
from TRM for SCLL, SCLH, HSSCLL and HSSCLH. I have notices that those
"default" values fail to provide a standard I2C clock for, at least,
boards that I have tested. Should those values be board specific and
taken off from the I2C driver? Or should a note be added there saying
"These values are board specific and they depend on the load on the SCL
line. Please measure and validate correct values for your board".


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