RE: [PATCH v4 3/6] ARM: dts: dra7: add support for parallel NAND flash

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>From: Quadros, Roger
[...]

>>> For now, I'll use GPMC address-space size = 0x380 as it matches with
>>> actual hardware and is working.
>>
>> How did you get 0x380?
>>
>> From DRA7 TRM, GPMC address range is 0x5000 0000 : 0x5000 02D0
>> So the address-space size should be 0x2D4 (as last register@2D0 is 32-bits wide)
>
>Sorry for the noise.
>Just figured out that the register space is not numerically arranged in the TRM.
>
>The last register is P GPMC_BCH_RESULT6_i
>	0x5000  0308  +  (0x0000   0010  *  i)
>	i = 0 to 7
>
>So size should be 0x37C.
>
Yes, as each {GPMC_BCH_RESULTx_i} group is incremented by 0x10,
so I aligned the last address to 0x380 boundary. Hope leaving room for
extra 4 bytes (0x380 - 0x37C) will not matter much?

All platforms from OMAP4 onwards share the same version of GPMC engine.
So this remains consistent. Only OMAP3 has older version of GPMC engine
which has register-space till 0x2d0.

>cheers,
>-roger
>

with regards, pekon
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