RE: [PATCH v4 3/6] ARM: dts: dra7: add support for parallel NAND flash

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Hello,

From: Javier Martinez Canillas [mailto:javier@xxxxxxxxxxxx]
>On Fri, May 9, 2014 at 10:46 PM, Pekon Gupta <pekon@xxxxxx> wrote:
>> From: Minal Shah <minalkshah@xxxxxxxxx>
[...]
>> +&gpmc {
>> +       status = "okay";
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&nand_flash_x16>;
>> +       ranges = <0 0 0 0x1000000>;
>> +       nand@0,0 {
>> +               reg = <0 0 0x380>;
[...]

>> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
>> index 37a0595..6af775a 100644
>> --- a/arch/arm/boot/dts/dra7.dtsi
>> +++ b/arch/arm/boot/dts/dra7.dtsi
>> @@ -776,6 +776,26 @@
>>                         interrupts = <0 343 0x4>;
>>                         status = "disabled";
>>                 };
>> +
>> +               elm: elm@48078000 {
>> +                       compatible = "ti,am3352-elm";
>> +                       reg = <0x48078000 0x2000>;
>
>It is really necessary to map all this 8 KB address space for GPMC registers?
>
>I don't have access to the DRA7 TRM but for example the OMAP3 TRM says
>that the GPMC module register address space size is 16 MB while in
>practice the registers use less than 1 KB (0..0x02d0 to be exact) so
>in arch/arm/boot/dts/omap3.dtsi we have:
>
These are not GPMC registers. Platforms from OMAP4 and beyond
(like AM335x, OMAP5) have another small hardware engine called ELM [1]
(Error Locater Module) in addition to GPMC, which is used for detecting
ECC errors in hardware. ELM Driver $KERNEL/drivers/mtd/devices/elm.c

However, thanks for pointing out, this address-space for ELM is incorrect.
Last ELM register offset is 0xFC0 (ELM_ERROR_LOCATION_15_7) [1].

>gpmc: gpmc@6e000000 {
>...
>                        reg = <0x6e000000 0x02d0>;
>...
>};
>
>Shouldn't this be similar (the same?) for DRA7 GPMC device node?
>
Newer platforms have upgraded version of GPMC engine which supports
BCH16 ECC scheme in hardware. Thus the GPMC address space was
expanded to include some extra registers required for BCH16 ECC [2].


>Thanks a lot and best regards,
>Javier

[1] http://www.ti.com/lit/gpn/am3359    (Section 7.4 to 7.4.5)

[2] http://www.ti.com/lit/gpn/am3359    (Section 7.1 to 7.1.5)
(Though the AM335x address space mentions 0x368 as last address,
 it should be 0x378. I have raised documentation bug for it).


with regards, pekon
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