On Wed, Nov 11, 2020 at 03:33:18PM +0100, Arnd Bergmann wrote: > On Wed, Nov 11, 2020 at 2:39 PM Thomas Bogendoerfer > <tsbogend@xxxxxxxxxxxxxxxx> wrote: > > On Wed, Nov 11, 2020 at 11:57:02AM +0100, Arnd Bergmann wrote: > > > On Wed, Nov 11, 2020 at 11:26 AM Mike Rapoport <rppt@xxxxxxxxxx> wrote: > > > > > > > > On Wed, Nov 11, 2020 at 10:33:29AM +0100, Arnd Bergmann wrote: > > > > > On Tue, Nov 10, 2020 at 5:21 PM Mike Rapoport <rppt@xxxxxxxxxx> wrote: > > > > > > On Tue, Nov 10, 2020 at 12:21:11PM +0100, Arnd Bergmann wrote: > > > > > > > > > > > > > > To be on the safe side, we could provoke a compile-time error > > > > > > > when CONFIG_PHYS_ADDR_T_64BIT is set on a 32-bit > > > > > > > architecture, but MAX_POSSIBLE_PHYSMEM_BITS is not set. > > > > > > > > > > > > Maybe compile time warning and a runtime error in zs_init() if 32 bit > > > > > > machine has memory above 4G? > > > > > > > > > > If the fix is as easy as adding a single line in a header, I think a > > > > > compile-time > > > > > error makes it easier, no need to wait for someone to boot a broken > > > > > system before fixing it. > > > > > > > > Not sure it would be as easy as adding a single line in a header for > > > > MIPS with it's diversity. > > > > > > I looked up the architecture, and found: > > > > > > - The pre-MIPS32r1 cores only support 32-bit addressing > > > - octeon selects PHYS_ADDR_T_64BIT but no longer > > > supports 32-bit kernels > > > - Alchemy and netlogic (XLR, XLP) have 36-bit addressing > > > - CONFIG_XPA implies 40-bit addressing > > > > MIPS32r5 might have up to 60-bit addressing according to the MIPS32 PRA > > docuemnt (MD00090). But there is probably no chip, which implements it > > so for now 40-bit addressing is correct. > > > > > > > > We should run it by the MIPS maintainers, but I think this patch > > > is sufficient: > > > > Do you want me to run it through mips tree or do you need an > > Acked-By from me ? > > I'll follow up with a proper submission for MIPS and the other > architectures, please apply that one. Thanks, Arnd!
