Bernie Innocenti wrote:
El Tue, 06-10-2009 a las 20:06 -0400, Bernie Innocenti escribió:
The early revs of these chips did have a number of errata specific to PCI-X.
I checked the revision (09) against the sata_mv source and I couldn't
spot anything relevant to us.
NEWSFLASH: today we replaced the 4x500GB Seagate drives with 4x1.5TB
drives and reconstruction of the array has been running for 2h without a
glitch.
One interesting difference is that the 500GB drives were being
configured in 1.5Gbps SATA mode. Another notable difference is the
sequential read speed: ~70MB/s vs ~130MB/s with the 1.5TB model.
Could the PCI bus errors be a red herring?
..
Dunno. Rev.9 == "C0" in Marvell terminology,
and that's the latest/final rev for the 6081 chip,
with most of the PCI-X bugs fixed or worked around.
So not much to go on there.
The Bus error report was real, though.
But with 3.0gb/sec sata connections, the chip will be
using some different internal clocks and timings,
which could be enough to avoid triggering the PCI errors.
I guess. Let's hope so, anyway.
Cheers
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