On Saturday 19 April 2008, Sergei Shtylyov wrote:
[...]
> > @@ -124,6 +124,54 @@ static inline unsigned long siimage_seld
> > return base;
> > }
> >
> > +static u8 sil_ioread8(struct pci_dev *dev, unsigned long addr)
> > +{
> > + u8 tmp = 0;
> > +
> > + if (pci_get_drvdata(dev))
> > + tmp = readb((void __iomem *)addr);
> > + else
> > + pci_read_config_byte(dev, addr, &tmp);
> > +
> > + return tmp;
> > +}
> > +
> > +static u16 sil_ioread16(struct pci_dev *dev, unsigned long addr)
> > +{
> > + u16 tmp = 0;
> > +
> > + if (pci_get_drvdata(dev))
> > + tmp = readw((void __iomem *)addr);
> > + else
> > + pci_read_config_word(dev, addr, &tmp);
> > +
> > + return tmp;
> > +}
> > +
> > +static void sil_iowrite8(struct pci_dev *dev, u8 val, unsigned long addr)
> > +{
> > + if (pci_get_drvdata(dev))
> > + writeb(val, (void __iomem *)addr);
> > + else
> > + pci_write_config_byte(dev, addr, val);
> > +}
> > +
> > +static void sil_iowrite16(struct pci_dev *dev, u16 val, unsigned long addr)
> > +{
> > + if (pci_get_drvdata(dev))
> > + writew(val, (void __iomem *)addr);
> > + else
> > + pci_write_config_word(dev, addr, val);
> > +}
> > +
> > +static void sil_iowrite32(struct pci_dev *dev, u32 val, unsigned long addr)
> > +{
> > + if (pci_get_drvdata(dev))
> > + writel(val, (void __iomem *)addr);
> > + else
> > + pci_write_config_dword(dev, addr, val);
> > +}
> > +
>
> I think this could be further imporoved -- since we have to call
> pci_get_drvdata() in the accessors anyway, we could have used it to get the
> MMIO base right there, and thus be freed from the necessity to add it to the
> MMIO offset in the callers and also most probably from having it copied to
> hwif->hwif_data.
[...]
Or maybe we can remove sil_io* and always use PCI access (on the second
look none of sil_io* users seems to be performance critical)...
> > @@ -557,50 +513,80 @@ static unsigned int setup_mmio_siimage (
> [...]
> > + sil_iowrite8(dev, 0x72, base + 0xA1);
> > + sil_iowrite16(dev, 0x328A, base + 0xA2);
> > + sil_iowrite32(dev, 0x62DD62DD, base + 0xA4);
> > + sil_iowrite32(dev, 0x43924392, base + 0xA8);
> > + sil_iowrite32(dev, 0x40094009, base + 0xAC);
> > + sil_iowrite8(dev, 0x72, base ? (base + 0xE1) : 0xB1);
> > + sil_iowrite16(dev, 0x328A, base ? (base + 0xE2) : 0xB2);
> > + sil_iowrite32(dev, 0x62DD62DD, base ? (base + 0xE4) : 0xB4);
> > + sil_iowrite32(dev, 0x43924392, base ? (base + 0xE8) : 0xB8);
> > + sil_iowrite32(dev, 0x40094009, base ? (base + 0xEC) : 0xBC);
> > +
>
> Sigh, I was going to send a patch getting rid of these writes altogether
> last year -- there should be no point in setting PIO/DMA/UDMA timings here.
Heh, I know the feeling damn too well - I still have few low-prio patches
back from *2004* which need to be refreshed and pushed out...
> Maybe I'll submit it...
Just do it. ;)
Thanks,
Bart
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