Question about PATA Sil680 Bus Reset Code

["Fajun Chen" <fajunchen@xxxxxxxxx>]

Hi,

Could someone help me interpret the code snippet below:
static int sil680_bus_reset(struct ata_port *ap,unsigned int *classes)
{
       struct pci_dev *pdev = to_pci_dev(ap->host->dev);
       unsigned long addr = sil680_selreg(ap, 0);
       u8 reset;

       pci_read_config_byte(pdev, addr, &reset);
       pci_write_config_byte(pdev, addr, reset | 0x03);   // ?
       udelay(25);
       pci_write_config_byte(pdev, addr, reset);
       return ata_std_softreset(ap, classes);
}

Based on Sil680 data sheet, channel reset bit is bit 2,  why the reset
code above is not "pci_write_config_byte(pdev, addr, reset | 0x04);"?

Thanks in advance!

Fajun
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