Patch 8/9:
Currently ata_tf_load() writes to the Control register if it is changed.
The relevant bits in the ctl register are HOB, SRST and nIEN.
- HOB is only used by ata_tf_read().
- For SRST, soft reset is not the duty of tf_load.
- For nIEN, explicit irq_on()/irq_off and freeze()/thaw() are provided.
Since EH/HSM now call freeze()/thaw() for irq off/on explicitly.
The implicit nIEN handling is removed from ata_tf_load().
The nIEN snoop codes are also removed from sata_vsc.
Signed-off-by: Albert Lee <albertcc@xxxxxxxxxx>
---
diff -Nrup 07_sata_promise_freeze/drivers/ata/libata-sff.c 08_tfload_cleanup/drivers/ata/libata-sff.c
--- 07_sata_promise_freeze/drivers/ata/libata-sff.c 2007-06-12 13:15:17.000000000 +0800
+++ 08_tfload_cleanup/drivers/ata/libata-sff.c 2007-06-12 14:52:57.000000000 +0800
@@ -153,11 +153,13 @@ void ata_tf_load(struct ata_port *ap, co
struct ata_ioports *ioaddr = &ap->ioaddr;
unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
- if (tf->ctl != ap->last_ctl) {
- iowrite8(tf->ctl, ioaddr->ctl_addr);
- ap->last_ctl = tf->ctl;
- ata_wait_idle(ap);
- }
+ /*
+ * The relevant bits in the ctl register are HOB, SRST and nIEN.
+ * HOB is only used by ata_tf_read().
+ * For SRST, soft reset is not the duty of tf_load.
+ * For nIEN, explicit ->irq_on() and ->irq_off are provided.
+ * That's why tf->ctl is ignored here.
+ */
if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
iowrite8(tf->hob_feature, ioaddr->feature_addr);
diff -Nrup 07_sata_promise_freeze/drivers/ata/pata_scc.c 08_tfload_cleanup/drivers/ata/pata_scc.c
--- 07_sata_promise_freeze/drivers/ata/pata_scc.c 2007-06-12 14:58:15.000000000 +0800
+++ 08_tfload_cleanup/drivers/ata/pata_scc.c 2007-06-12 14:58:20.000000000 +0800
@@ -271,12 +271,6 @@ static void scc_tf_load (struct ata_port
struct ata_ioports *ioaddr = &ap->ioaddr;
unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
- if (tf->ctl != ap->last_ctl) {
- out_be32(ioaddr->ctl_addr, tf->ctl);
- ap->last_ctl = tf->ctl;
- ata_wait_idle(ap);
- }
-
if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
out_be32(ioaddr->feature_addr, tf->hob_feature);
out_be32(ioaddr->nsect_addr, tf->hob_nsect);
diff -Nrup 07_sata_promise_freeze/drivers/ata/sata_svw.c 08_tfload_cleanup/drivers/ata/sata_svw.c
--- 07_sata_promise_freeze/drivers/ata/sata_svw.c 2007-06-11 17:24:51.000000000 +0800
+++ 08_tfload_cleanup/drivers/ata/sata_svw.c 2007-06-12 13:37:46.000000000 +0800
@@ -125,11 +125,6 @@ static void k2_sata_tf_load(struct ata_p
struct ata_ioports *ioaddr = &ap->ioaddr;
unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
- if (tf->ctl != ap->last_ctl) {
- writeb(tf->ctl, ioaddr->ctl_addr);
- ap->last_ctl = tf->ctl;
- ata_wait_idle(ap);
- }
if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
writew(tf->feature | (((u16)tf->hob_feature) << 8),
ioaddr->feature_addr);
diff -Nrup 07_sata_promise_freeze/drivers/ata/sata_vsc.c 08_tfload_cleanup/drivers/ata/sata_vsc.c
--- 07_sata_promise_freeze/drivers/ata/sata_vsc.c 2007-06-11 17:25:50.000000000 +0800
+++ 08_tfload_cleanup/drivers/ata/sata_vsc.c 2007-06-13 13:47:24.000000000 +0800
@@ -137,36 +137,11 @@ static void vsc_thaw(struct ata_port *ap
}
-static void vsc_intr_mask_update(struct ata_port *ap, u8 ctl)
-{
- void __iomem *mask_addr;
- u8 mask;
-
- mask_addr = ap->host->iomap[VSC_MMIO_BAR] +
- VSC_SATA_INT_MASK_OFFSET + ap->port_no;
- mask = readb(mask_addr);
- if (ctl & ATA_NIEN)
- mask |= 0x80;
- else
- mask &= 0x7F;
- writeb(mask, mask_addr);
-}
-
-
static void vsc_sata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
{
struct ata_ioports *ioaddr = &ap->ioaddr;
unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
- /*
- * The only thing the ctl register is used for is SRST.
- * That is not enabled or disabled via tf_load.
- * However, if ATA_NIEN is changed, then we need to change the interrupt register.
- */
- if ((tf->ctl & ATA_NIEN) != (ap->last_ctl & ATA_NIEN)) {
- ap->last_ctl = tf->ctl;
- vsc_intr_mask_update(ap, tf->ctl & ATA_NIEN);
- }
if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
writew(tf->feature | (((u16)tf->hob_feature) << 8),
ioaddr->feature_addr);
-
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