Hi,
>> for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
>> hw.io_ports[i] = ide_virt_base + (i << 1);
>> }
>
>> hw.io_ports[IDE_CONTROL_OFFSET] = ide_virt_base + 0x10;
>
>> Thus it has an offset 0x10 from the base address.
>
>> ide0 at 0xc3856000-0xc3856007,0xc3856010 on irq 27
>
>> But I just noticed that A[2..0] should look like "110" when accessing the
>> "Device Control Register". Thus the offset should be 0x16 instead! Right?
>
> If your FPGA passes A[2..0] untouched to the IDE bus, it's certainly
> wrong. It must pass 110.
Stupid me. As I mentioned earlier CPU's A[3..1] are connected to HDD's
A[2..0]. And CPU's A4 is used for HDD's CS1 (inverted of course). Thus the
offset for IDE_CONTROL_OFFSET must be 0x1C (=0x10 + 0x6 << 1).
And volá
ide0 at 0xc3856000-0xc3856007,0xc385601c on irq 27
hda: max request size: 1024KiB
idedisk_supports_hpa(): cfs_enable_1=346b, cfs_enable_1=3469
idedisk_read_native_max_address_ext(): addr = 000004a852ff
idedisk_read_native_max_address_ext(): addr = 000004a852ff
idedisk_read_native_max_address_ext(): addr = 000004a85300
idedisk_read_native_max_address_ext(): addr = 000004a85300
hda: 78140160 sectors (40007 MB) w/8192KiB Cache, CHS=16383/255/63
hda: cache flushes supported
hda: hda1
idedisk_read_native_max_address_ext() works now. No HPA reported anymore!
Thanks a million to everyone!!!!
PS: Still I don't know why ARM reports "max request size: 1024KiB" and y86
reports only "max request size: 512KiB" ...
Steven
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