Jeff Garzik wrote:
Tejun Heo wrote:
@@ -738,6 +740,10 @@ static inline void sil24_host_intr(struc
slot_stat = readl(port + PORT_SLOT_STAT);
if (!(slot_stat & HOST_SSTAT_ATTN)) {
struct sil24_port_priv *pp = ap->private_data;
+
+ if (ap->flags & SIL24_FLAG_PCIX_IRQ_WOC)
+ writel(PORT_IRQ_COMPLETE, port + PORT_IRQ_STAT);
+
This looks racy. Since the interrupt is usually level-triggered,
doesn't this introduce the possibility of losing interrupt events?
Above code without the WOC flag test is actually equivalent to...
irq_stat = readl(port + PORT_IRQ_STAT);
if (irq_stat & 0xffff == PORT_IRQ_COMPLETE) {
writel(PORT_IRQ_COMPLETE, port + PORT_IRQ_STAT);
/* finish commands */
return;
}
/* error processing */
So, no race condition that I can think of. It's just like any other
interrupt clearing. Read it, clear it, handle it. If anything happens
before the clearing we catch it while handling (in this case, sil24 NCQ
support will read outstanding command mask after clearing the
interrupt). if anything happens after the clearing, we'll be called again.
--
tejun
-
: send the line "unsubscribe linux-ide" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
