On Mon, Jul 22, 2019 at 04:04:24PM +0000, Woods, Brian wrote: > On Mon, Jul 22, 2019 at 11:12:45AM +0200, Borislav Petkov wrote: > > On Mon, Jul 22, 2019 at 10:59:32AM +0200, Thomas Gleixner wrote: > > > On Fri, 19 Jul 2019, Guenter Roeck wrote: > > > > > We could merge his patches (if he contacted the x86 crew), make a v2 of > > > > > mine (71h -> 70h, add his Signed-off-by?) and merge, or some other option? > > > > > > > > > Either case, we'll need feedback from x86 maintainers. They are not exactly > > > > happy if anyone pushes a patch into arch/x86 without their approval. > > > > > > Adding those PCI ids looks straight forward. So feel free to route them > > > through hwmon with: > > > > ... but before you do that, let's wait for Brian to confirm the proper > > model range. > > > > Thx. > > > > -- > > Regards/Gruss, > > Boris. > > > > ECO tip #101: Trim your mails when you reply. > > -- > > Generally we use X0-XF for a model of processors. Starting at 70h would > be preferred. > > The PCI devices match our internal documentation for what it's worth. I > was going to test these patches but the system I borrowed was > requisitioned and hasn't been returned yet so I can't test them now, but > I don't want to delay these anymore. With 3900X, and the series applied, I get: k10temp-pci-00c3 Adapter: PCI adapter Tdie: +45.1°C (high = +70.0°C) Tctl: +45.1°C which looks about right. Interesting, though. I thought there are two CPU dies on this chip. I guess the temperature sensor is on the IO block ? If so, are there additional sensors on the CPU dies ? Guenter > > Assuming the change from 71h -> 70h, feel free to add: > Acked-by: Brian Woods <brian.woods@xxxxxxx> > > -- > Brian Woods
