On 18/07/2019 22:33, Guenter Roeck wrote: > On Thu, Jul 18, 2019 at 09:26:16PM +0300, Marcel Bocu wrote: >> The AMD Ryzen gen 3 processors came with a different PCI IDs for the >> function 3 & 4 which are used to access the SMN interface. The root >> PCI address however remained at the same address as the model 30h. >> >> Adding the F3/F4 PCI IDs respectively to the misc and link ids appear >> to be sufficient for k10temp, so let's add them and follow up on the >> patch if other functions need more tweaking. >> >> Signed-off-by: Marcel Bocu <marcel.p.bocu@xxxxxxxxx> >> Tested-by: Marcel Bocu <marcel.p.bocu@xxxxxxxxx> >> > > How is this version of the patch series different to the first version ? They seem pretty much identical except for the macro's name (71h vs 70h) and the fact that I already Cc:ed the x86 crew. I had checked this weekend if there were patches already for this, but I guess Vicki sent his patches right after I checked. Sorry for the noise! Could anyone add Vicki Pfau (I don't have his email address because I subscribed to this list after he sent his patches), and then we can ask him if he already submited his patches to x86 or not. In any case, whatever patchset gets selected for inclusion, I suggest we both sign off on the commit (I do not care about authorship). I will anyway try to follow up with other patches to access the chipset's temperature and the fan speed. Sorry again for the noise! Marcel
