Re: [PATCH] gpio: pl061: Support implementations without GPIOINTR line

[Linus Walleij <linus.walleij@xxxxxxxxxx>]

On Mon, Mar 22, 2021 at 10:46 AM Alexander Sverdlin
<alexander.sverdlin@xxxxxxxxx> wrote:

> But there are standard PL061 and these without common IRQ line within one SoC.
> Are you sure that's what we want, that same DTS will contain different compatible
> string for this? Sounds non-obvious and error-prone to me.

So this is indeed a standard feature of the PL061
that doesn not warrant a special compatible string.
So I was wrong about that.

I was wrong about more things:

> And this is really something we can auto-detect. We even discussed this already:
> https://lore.kernel.org/linux-gpio/CACRpkdZpYzpMDWqJobSYH=JHgB74HbCQihOtexs+sVyo6SRJdA@xxxxxxxxxxxxxx/
(...)
> - If the component has 8 IRQ lines, create a hierarchical IRQdomain
>   and chip using a gpiolib core helper.
>
> - If not 1 or 8 lines, bail out with an error.

Don't trust that guy, he's often confused and has no
idea what he's doing ;)

The thing is that hierarchical interrupts are supposed to
connect the lines by absolute offsets that are *not* coming
from the device tree. This is the pattern taken by other
in-tree hierarchical GPIO controllers. We have repeatedly
NACKed patches adding all the IRQs to hierarchical
GPIO interrupt controllers, in favor of using hardcoded
offsets in the driver.

Do you have some good idea of how we can achieve that?

Yours,
Linus Walleij