Re: [PATCH] gpio: pl061: Support implementations without GPIOINTR line

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On Mon, Mar 22, 2021 at 9:52 AM Alexander Sverdlin
<alexander.sverdlin@xxxxxxxxx> wrote:
> On 20/03/2021 12:28, Linus Walleij wrote:
> > This is starting to look right :)
> >
> > But use the top-level board DT compatible to determine that
> > hiearchy is needed, and implement a per-soc child_to_parent_hwirq()
> > and do not attempt to get the IRQs from the device tree.
>
> No! We have all 3 variants on the same board (without IRQs as well)!
> Even AXXIA has 1-parent and 8-parent variant in the same upstream DT!

OK we have to discern it somehow. Since the SoC integration is
specific for these PL061 instances, we would normally add a
unique compatible string for this version of the GPIO controller.

The compatible field is intended to say how this hardware
works after all. I would even say the original PL061 has
been modified to pull out individual IRQ lines so the cell is
arguably no more compatible with "arm,pl061".
As far as I understand the original PrimeCell can't really
do that, someone has been hacking the VHDL code.

However since this is a PrimeCell, first check if the
PrimeCell ID number has been updated in the hardware.
(Just hack drivers/amba/bus.c to print what it finds in the
PID/CID registers when probing.) If LSI have been nice
enough to update this ID with something unique then
that can be used to determine the variant.

If the PrimeCell ID has not been updated (and this happens)
I'd say we need to use a unique compatible string.

You'll have to update this first:
Documentation/devicetree/bindings/gpio/pl061-gpio.yaml

I think it should be something like

compatible = "lsi,<soc-name>-pl061", "arm,primecell";

Where <soc-name> is something reasonable for this
SoC unless LSI have their own name for this modified
block on this SoC. I think it needs to be SoC-unique
since I bet it will be routing the IRQs to different HW IRQs
every time a new SoC is made.

Then augment the behaviour in the PL061 driver accordingly
when this new compatible is found, using the HW offsets
for this SoC.

Yours,
Linus Walleij



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