Re: [PATCH] gpio: pl061: Support implementations without GPIOINTR line

[Alexander Sverdlin <alexander.sverdlin@xxxxxxxxx>]

Hi!

On 22/03/2021 10:32, Linus Walleij wrote:
> I think it should be something like
> 
> compatible = "lsi,<soc-name>-pl061", "arm,primecell";
> 
> Where <soc-name> is something reasonable for this
> SoC unless LSI have their own name for this modified
> block on this SoC. I think it needs to be SoC-unique
> since I bet it will be routing the IRQs to different HW IRQs
> every time a new SoC is made.
> 
> Then augment the behaviour in the PL061 driver accordingly
> when this new compatible is found, using the HW offsets
> for this SoC.

But there are standard PL061 and these without common IRQ line within one SoC.
Are you sure that's what we want, that same DTS will contain different compatible
string for this? Sounds non-obvious and error-prone to me.

And this is really something we can auto-detect. We even discussed this already:
https://lore.kernel.org/linux-gpio/CACRpkdZpYzpMDWqJobSYH=JHgB74HbCQihOtexs+sVyo6SRJdA@xxxxxxxxxxxxxx/

"I would make a patch that:

- If the device has 1 IRQ line, assume it is GPIOINTR and work
  as before.

- If the component has 8 IRQ lines, create a hierarchical IRQdomain
  and chip using a gpiolib core helper.

- If not 1 or 8 lines, bail out with an error.

Yours,
Linus Walleij" 

-- 
Best regards,
Alexander Sverdlin.