Re: Fwd: Twinhan 1025 problem - Knoppix works, FC4 & Ubuntu don't

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On Mon, 17 Apr 2006, Manu Abraham wrote:

Ken Harris wrote:

    Sirs:

    I did some tests with a voltmeter and an oscilloscope a few days ago:

dvb-apps/test/setvoltage: doesn't seem to work
dvb-apps/test/set22k: works OK
dvb-apps/test/sendburst: doesn't seem to work
dvb-apps/test/diseqc: seems to work

An odd symptom is that when I ran 'dvbscan', then the voltage did change (from 13v to 19v), but I couldn't use 'setvoltage' to change it.

Can you get in some logs, dst module loaded with dst_algo=0 verbose=5 module parameters

Manu

	Here it is (I added some blank lines and comments):

Linux video capture interface: v1.00

bttv: driver version 0.9.16 loaded
bttv: using 8 buffers with 2080k (520 pages) each for capture
bttv: Bt8xx card found (0).

ACPI: PCI Interrupt Link [LNKA] enabled at IRQ 9
PCI: setting IRQ 9 as level-triggered
ACPI: PCI Interrupt 0000:01:07.0[A] -> Link [LNKA] -> GSI 9 (level, low) -> IRQ 9

bttv0: Bt878 (rev 17) at 0000:01:07.0, irq: 9, latency: 64, mmio: 0xfc0ff000
bttv0: detected: Twinhan VisionPlus DVB [card=113], PCI subsystem ID is 1822:0001
bttv0: using: Twinhan DST + clones [card=113,autodetected]
bttv0: gpio: en=00000000, out=00000000 in=00d500ff [init]
bttv0: using tuner=4
bttv0: add subdevice "dvb0"

bt878: AUDIO driver version 0.0.0 loaded
bt878: Bt878 AUDIO function found (0).
ACPI: PCI Interrupt 0000:01:07.1[A] -> Link [LNKA] -> GSI 9 (level, low) -> IRQ 9
bt878(0): Bt878 (rev 17) at 01:07.1, irq: 9, latency: 64, memory: 0xfc0fe000

## stuff deleted (USB, md, SELinux, etc)

## modprobe dvb-bt8xx

DVB: registering new adapter (bttv0).

dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 06 00 00 00 00 00 fa ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x44
 0x53 0x54 0x2d 0x30 0x33 0x54 0x31
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]

dst(0) dst_get_device_id: Recognise [DST-03T]

dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 04 00 00 00 00 00 fc ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 0
dst(0) read_dst: reply is 0x0
 0x4 0x0 0x0 0x0 0x0 0x0 0xfc
debug_dst_buffer: [ 00 04 00 00 00 00 00 fc]

dst(0) dst_get_device_id: Unsupported
dst(0) dst_get_device_id: [DST-03T] has a [Fujitsu MB86A15]
dst(0) dst_type_print: DST type: satellite
DST type flags : 0x2 ts204 0x4 symdiv 0x10 firmware version = 2

dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 0a 00 00 00 00 00 f6 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 0
dst(0) read_dst: reply is 0x0
 0x8 0xca 0x10 0x17 0x49 0x76 0x48
dst(0) dst_get_mac: MAC Address=[00:08:ca:17:49:00]

DVB: registering frontend 0 (DST DVB-S)...

## setvoltage 18

dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 03 b6 01 00 00 3d ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0x3 0xb6 0x1 0x0 0x0 0x3d

dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 03 b6 00 00 00 3e ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0x3 0xb6 0x0 0x0 0x0 0x3e

## set22k on

dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 02 b6 01 00 00 3e ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0x2 0xb6 0x1 0x0 0x0 0x3e

dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 02 b6 00 00 00 3f ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0x2 0xb6 0x0 0x0 0x0 0x3f

## sendburst a

dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff b6 01 00 00 41 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xb6 0x1 0x0 0x0 0x41

dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5

dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 00 00 00 f6 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x0 0x0 0x0 0xf6

## diseqc all

dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 03 b6 00 00 00 3e ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0x3 0xb6 0x0 0x0 0x0 0x3e

dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff b6 01 00 00 41 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xb6 0x1 0x0 0x0 0x41

dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff b6 01 00 00 41 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xb6 0x1 0x0 0x0 0x41

dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 08 04 e0 10 38 f0 dc ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 9
dst(0) read_dst: reply is 0x0
 0x8 0x4 0xe0 0x10 0x38 0xf0 0xdc

dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5

dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5

dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 08 04 e0 10 38 f2 da ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 9
dst(0) read_dst: reply is 0x0
 0x8 0x4 0xe0 0x10 0x38 0xf2 0xda
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 08 04 e0 10 38 f1 db ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 9
dst(0) read_dst: reply is 0x0
 0x8 0x4 0xe0 0x10 0x38 0xf1 0xdb
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 02 02 01 00 00 f2 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0x2 0x2 0x1 0x0 0x0 0xf2
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 08 04 e0 10 38 f3 d9 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 9
dst(0) read_dst: reply is 0x0
 0x8 0x4 0xe0 0x10 0x38 0xf3 0xd9
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 02 02 01 00 00 f2 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0x2 0x2 0x1 0x0 0x0 0xf2
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 08 04 e0 10 38 f4 d8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 9
dst(0) read_dst: reply is 0x0
 0x8 0x4 0xe0 0x10 0x38 0xf4 0xd8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff ff 01 00 00 f8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xff 0x1 0x0 0x0 0xf8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff ff 01 00 00 f8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xff 0x1 0x0 0x0 0xf8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff ff 01 00 00 f8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xff 0x1 0x0 0x0 0xf8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 08 04 e0 10 38 f6 d6 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 9
dst(0) read_dst: reply is 0x0
 0x8 0x4 0xe0 0x10 0x38 0xf6 0xd6
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff ff 01 00 00 f8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xff 0x1 0x0 0x0 0xf8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff ff 01 00 00 f8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xff 0x1 0x0 0x0 0xf8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff ff 01 00 00 f8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xff 0x1 0x0 0x0 0xf8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 08 04 e0 10 38 f5 d7 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 9
dst(0) read_dst: reply is 0x0
 0x8 0x4 0xe0 0x10 0x38 0xf5 0xd7
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff ff 01 00 00 f8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xff 0x1 0x0 0x0 0xf8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 02 ff 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0x2 0xff 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff ff 01 00 00 f8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xff 0x1 0x0 0x0 0xf8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 08 04 e0 10 38 f7 d5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 9
dst(0) read_dst: reply is 0x0
 0x8 0x4 0xe0 0x10 0x38 0xf7 0xd5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff ff 01 00 00 f8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xff 0x1 0x0 0x0 0xf8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 02 ff 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0x2 0xff 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff ff 01 00 00 f8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xff 0x1 0x0 0x0 0xf8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 08 04 e0 10 38 f8 d4 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 9
dst(0) read_dst: reply is 0x0
 0x8 0x4 0xe0 0x10 0x38 0xf8 0xd4
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 08 04 e0 10 38 fa d2 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 9
dst(0) read_dst: reply is 0x0
 0x8 0x4 0xe0 0x10 0x38 0xfa 0xd2
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 08 04 e0 10 38 f9 d3 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 9
dst(0) read_dst: reply is 0x0
 0x8 0x4 0xe0 0x10 0x38 0xf9 0xd3
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 02 02 01 00 00 f2 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0x2 0x2 0x1 0x0 0x0 0xf2
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 08 04 e0 10 38 fb d1 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 9
dst(0) read_dst: reply is 0x0
 0x8 0x4 0xe0 0x10 0x38 0xfb 0xd1
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 02 02 01 00 00 f2 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0x2 0x2 0x1 0x0 0x0 0xf2
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff 02 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0x2 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 08 04 e0 10 38 fc d0 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 9
dst(0) read_dst: reply is 0x0
 0x8 0x4 0xe0 0x10 0x38 0xfc 0xd0
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff ff 01 00 00 f8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xff 0x1 0x0 0x0 0xf8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff ff 01 00 00 f8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xff 0x1 0x0 0x0 0xf8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff ff 01 00 00 f8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xff 0x1 0x0 0x0 0xf8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 08 04 e0 10 38 fe ce ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 9
dst(0) read_dst: reply is 0x0
 0x8 0x4 0xe0 0x10 0x38 0xfe 0xce
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff ff 01 00 00 f8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xff 0x1 0x0 0x0 0xf8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff ff 01 00 00 f8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xff 0x1 0x0 0x0 0xf8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff ff 01 00 00 f8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xff 0x1 0x0 0x0 0xf8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 08 04 e0 10 38 fd cf ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 9
dst(0) read_dst: reply is 0x0
 0x8 0x4 0xe0 0x10 0x38 0xfd 0xcf
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff ff 01 00 00 f8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xff 0x1 0x0 0x0 0xf8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 02 ff 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0x2 0xff 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff ff 01 00 00 f8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xff 0x1 0x0 0x0 0xf8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 08 04 e0 10 38 ff cd ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 9
dst(0) read_dst: reply is 0x0
 0x8 0x4 0xe0 0x10 0x38 0xff 0xcd
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 ff ff 01 00 00 f8 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0xff 0xff 0x1 0x0 0x0 0xf8
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 02 ff 01 00 00 f5 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0x2 0xff 0x1 0x0 0x0 0xf5
dst(0) dst_comm_init: Initializing DST.
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0001], outhigh=[0000]
dst(0) rdc_reset_state: Resetting state machine
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0000]
dst(0) dst_gpio_outb: mask=[0002], enbb=[0002], outhigh=[0002]
writing [ 00 09 02 ff 00 00 00 f6 ]
dst(0) dst_gpio_outb: mask=[ffffffff], enbb=[0000], outhigh=[0000]
dst(0) read_dst: reply is 0xff
dst(0) dst_wait_dst_ready: dst wait ready after 1
dst(0) read_dst: reply is 0x0
 0x9 0x2 0xff 0x0 0x0 0x0 0xf6

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