On 7/11/2024 3:21 PM, Bryan O'Donoghue wrote:
On 10/07/2024 23:10, Dmitry Baryshkov wrote:
- Why is cam_cc_gdsc_clk not modelled in the clock framework?
This clock is kept enabled from probe, hence not required to be
modelled
explicitly.
Yes, I'm asking why it's kept up enabled from probe rather than via
clock framework?
FWIW my preference is to do it as Dmitry is suggesting here.
I'm not a big fan of hitting the register and leaving it as-is, would
much prefer to move to the model of having the CCF do it - so that for
example the clock appears in the /sys clock summary.
This clock is PoR ON clock and expected to be always enabled from HW
perspective, we are just re-ensuring it is ON from probe. Modelling this
clock is unnecessary, and we have been following this approach for gdsc
clock in all the recent chipsets, like for example sm8550 camcc.
---
bod