On 06/10/14 08:20, Kumar Gala wrote:
> On Jun 10, 2014, at 9:31 AM, Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxx> wrote:
>
>> The use case here is when we have a bootconsole which is printing the
>> characters on serial console and gsbi driver comes up after some time.
>> As gsbi driver disables the clock in probe the bootconsole locks up.
>>
>> This patch fixes the problem by disabling the clock in platform remove
>> rather than in probe.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxx>
>> ---
>> drivers/soc/qcom/qcom_gsbi.c | 46 +++++++++++++++++++++++++++++++-------------
>> 1 file changed, 33 insertions(+), 13 deletions(-)
> It seems like we shouldn’t need this change. Adding Stephen to see if there is a reason we don’t have the clk’s enable_count adjusted for how the bootloader setup clks.
This is a long standing problem with the clock framework. In our vendor
tree we've added something called "handoff" which basically detects the
state of all clocks upon registration and keeps clocks enabled until
late_init() if the clocks were enabled at the time of registration.
For this case though "handoff" doesn't seem necessary. It's easier to
just disable the clock when the driver is removed. With finer grained
power management this driver can participate in runtime_pm and disable
the ahb clock when the device is runtime suspended; which would only
happen when the child devices (uart/spi/i2c) are also runtime suspended.
> - k
>
>> diff --git a/drivers/soc/qcom/qcom_gsbi.c b/drivers/soc/qcom/qcom_gsbi.c
>> index ab7b441..64fb298 100644
>> --- a/drivers/soc/qcom/qcom_gsbi.c
>> +++ b/drivers/soc/qcom/qcom_gsbi.c
>> @@ -22,44 +22,63 @@
>> #define GSBI_CTRL_REG 0x0000
>> #define GSBI_PROTOCOL_SHIFT 4
>>
>> +struct gsbi_info {
>> + struct clk *hclk;
>> + u32 mode;
>> + u32 crci;
>> +};
What does mode and crci have to do with this patch? Can't we just put
the clock into the platform data?
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