On Tue, Jun 03 2014 at 5:24:01 pm BST, Mathew Li <mathew.li100@xxxxxxxxx> wrote: > Thanks for all the answers Marc. I had one more question: > > Theoretically, can a pcpu running in kernel mode (i.e. non-HYP mode) > write to the list register in vcpu control interface of another pcpu > (i.e. different from the writing pcpu)? There are two things here: - Not sure if you could write to the GICH range from EL1. I don't see anything in the spec that forbids it, but that clearly contrary to the spirit of the architecture. - GICv2 gives you the ability to write to other CPUs GICH range, but doesn't give you any way to synchronise your changes with what the vcpu does. As such, this is completely unusable (and GICv3 has thankfully removed this /feature/ from the architecture). M. -- Jazz is not dead. It just smells funny. _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
