On Tue, Jun 03 2014 at 12:10:28 pm BST, "Bharat.Bhushan@xxxxxxxxxxxxx" <Bharat.Bhushan@xxxxxxxxxxxxx> wrote: >> > 2. Looking at the code in virt/kvm/arm/vgic.c, it looks like we use >> > maintenance interrupt to update our in-memory data structures when >> > guest EOIs the interrupt. That would mean, we would exit the VM every >> > time guest does an EOI. Is that correct? >> >> Only when we use level interrupts. > > Do you mean that it exit on EOI for level interrupt and not for > edge/msi interrupts? Exactly. > Can you please explain how vgic send next available interrupt of lower > or same priority if not exit on EOI for msi/edge interrupt? Look at point 4 of Mathew's description. When injecting the interrupt, you kick the vcpu to force it to reload its state. Additionally, if you have more pending interrupts than your list registers can contain, you set the underflow trigger for the maintainance interrupt, resulting in an exit when you can reload new pending interrupts. M. -- Jazz is not dead. It just smells funny. _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
