From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> The current drain lantency computation relies on hardcoded limits to determine when the to use the low vs. high precision multiplier. Rewrite the code to use a more straightforward approach. Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/intel_pm.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 0f0281a..d6c6c1b 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -727,12 +727,15 @@ static bool vlv_compute_drain_latency(struct drm_crtc *crtc, return false; entries = DIV_ROUND_UP(clock, 1000) * pixel_size; - if (IS_CHERRYVIEW(dev)) - *prec_mult = (entries > 32) ? 16 : 8; - else - *prec_mult = (entries > 128) ? 64 : 32; + + *prec_mult = IS_CHERRYVIEW(dev) ? 16 : 64; *drain_latency = (64 * (*prec_mult) * 4) / entries; + if (*drain_latency > DRAIN_LATENCY_MASK) { + *prec_mult /= 2; + *drain_latency = (64 * (*prec_mult) * 4) / entries; + } + if (*drain_latency > DRAIN_LATENCY_MASK) *drain_latency = DRAIN_LATENCY_MASK; -- 2.0.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx