On Fri, Nov 07, 2014 at 02:20:17PM -0800, O'Rourke, Tom wrote: > On Fri, Nov 07, 2014 at 10:50:02AM +0100, Daniel Vetter wrote: > > > + ret = sandybridge_pcode_read(dev_priv, > > > + HSW_PCODE_DYNAMIC_DUTY_CYCLE_CONTROL, > > > + &ddcc_status); > > > + if (0 == ret) > > > + dev_priv->rps.efficient_freq = (ddcc_status >> 8) & 0xff; > > > > Control flow in the error case looks funny here - shouldn't we put the > > adjustment of the softlimit into the (ret == 0) case here to avoid putting > > garbage into it in case the pcode read falls over? > > > If the pcode read fails, the efficient_freq will not > be set here and will still have the non-garbage value > set in parse_rp_state_cap. Oh right I've missed this. Maybe update the XXX comment in that function and replace it with /* Platforms which support special RP-efficient values will * overwrite this in their setup fucntions, use rp1_freq as * default. */ Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
