> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Imre Deak
> Sent: Wednesday, 29 January 2025 22.02
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx; intel-xe@xxxxxxxxxxxxxxxxxxxxx
> Subject: [PATCH 15/17] drm/i915/ddi: Reuse helper to compute the HDMI
> PORT_BUF_CTL1 config
>
> Reuse the existing helper to compute the configuration value of the
> XELPDP_PORT_BUF_CTL1 register for HDMI outputs instead of open-coding this.
>
Reviewed-by: Mika Kahola <mika.kahola@xxxxxxxxx>
> Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 21 +++++++--------------
> 1 file changed, 7 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index e03ec9a235d33..431db1e6b6f07 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2607,9 +2607,12 @@ static void mtl_port_buf_ctl_program(struct
> intel_encoder *encoder,
> enum port port = encoder->port;
> u32 val = 0;
>
> + if (DISPLAY_VER(display) < 14)
> + return;
> +
> val |= XELPDP_PORT_WIDTH(crtc_state->lane_count);
>
> - if (intel_dp_is_uhbr(crtc_state))
> + if (intel_crtc_has_dp_encoder(crtc_state) &&
> +intel_dp_is_uhbr(crtc_state))
> val |= XELPDP_PORT_BUF_PORT_DATA_40BIT;
> else
> val |= XELPDP_PORT_BUF_PORT_DATA_10BIT; @@ -2618,7
> +2621,8 @@ static void mtl_port_buf_ctl_program(struct intel_encoder
> *encoder,
> val |= XELPDP_PORT_REVERSAL;
>
> intel_de_rmw(display, XELPDP_PORT_BUF_CTL1(display, port),
> - XELPDP_PORT_WIDTH_MASK |
> XELPDP_PORT_BUF_PORT_DATA_WIDTH_MASK,
> + XELPDP_PORT_WIDTH_MASK | XELPDP_PORT_REVERSAL |
> + XELPDP_PORT_BUF_PORT_DATA_WIDTH_MASK,
> val);
> }
>
> @@ -3418,7 +3422,6 @@ static void intel_ddi_enable_hdmi(struct
> intel_atomic_state *state, {
> struct intel_display *display = to_intel_display(encoder);
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> - struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> struct drm_connector *connector = conn_state->connector;
> enum port port = encoder->port;
>
> @@ -3485,17 +3488,7 @@ static void intel_ddi_enable_hdmi(struct
> intel_atomic_state *state,
> * is filled with lane count, already set in the crtc_state.
> * The same is required to be filled in PORT_BUF_CTL for C10/20 Phy.
> */
> - if (DISPLAY_VER(dev_priv) >= 14) {
> - u32 port_buf = 0;
> -
> - port_buf |= XELPDP_PORT_WIDTH(crtc_state->lane_count);
> -
> - if (dig_port->lane_reversal)
> - port_buf |= XELPDP_PORT_REVERSAL;
> -
> - intel_de_rmw(dev_priv, XELPDP_PORT_BUF_CTL1(dev_priv,
> port),
> - XELPDP_PORT_WIDTH_MASK |
> XELPDP_PORT_REVERSAL, port_buf);
> - }
> + mtl_port_buf_ctl_program(encoder, crtc_state);
>
> intel_enable_ddi_buf(encoder, intel_ddi_buf_ctl_config_val(encoder,
> crtc_state)); }
> --
> 2.44.2
