On Mon, Aug 19, 2024 at 09:44:36PM +0300, Jani Nikula wrote:
> Switch to using the new display->is.PLATFORM members.
>
> There are still cases like IS_G4X() which is trivial with macros, but
> not so with platform members. Ditto for IS_IRONLAKE_M() and IS_IVB_GT1()
> etc. although not used in this file.
>
> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 36 +++++++++--------------
> 1 file changed, 14 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index d49435af62c7..c701f13e0cf6 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1168,7 +1168,6 @@ static int intel_bios_ssc_frequency(struct intel_display *display,
> static void
> parse_general_features(struct intel_display *display)
> {
> - struct drm_i915_private *i915 = to_i915(display->drm);
> const struct bdb_general_features *general;
>
> general = bdb_find_section(display, BDB_GENERAL_FEATURES);
> @@ -1178,7 +1177,7 @@ parse_general_features(struct intel_display *display)
> display->vbt.int_tv_support = general->int_tv_support;
> /* int_crt_support can't be trusted on earlier platforms */
> if (display->vbt.version >= 155 &&
> - (HAS_DDI(display) || IS_VALLEYVIEW(i915)))
> + (HAS_DDI(display) || display->is.VALLEYVIEW))
> display->vbt.int_crt_support = general->int_crt_support;
> display->vbt.lvds_use_ssc = general->enable_ssc;
> display->vbt.lvds_ssc_freq =
> @@ -1541,7 +1540,6 @@ static void
> parse_psr(struct intel_display *display,
> struct intel_panel *panel)
> {
> - struct drm_i915_private *i915 = to_i915(display->drm);
> const struct bdb_psr *psr;
> const struct psr_table *psr_table;
> int panel_type = panel->vbt.panel_type;
> @@ -1566,7 +1564,7 @@ parse_psr(struct intel_display *display,
> * Old decimal value is wake up time in multiples of 100 us.
> */
> if (display->vbt.version >= 205 &&
> - (DISPLAY_VER(display) >= 9 && !IS_BROXTON(i915))) {
> + (DISPLAY_VER(display) >= 9 && !display->is.BROXTON)) {
> switch (psr_table->tp1_wakeup_time) {
> case 0:
> panel->vbt.psr.tp1_wakeup_time_us = 500;
> @@ -2028,11 +2026,9 @@ static void icl_fixup_mipi_sequences(struct intel_display *display,
> static void fixup_mipi_sequences(struct intel_display *display,
> struct intel_panel *panel)
> {
> - struct drm_i915_private *i915 = to_i915(display->drm);
> -
> if (DISPLAY_VER(display) >= 11)
> icl_fixup_mipi_sequences(display, panel);
> - else if (IS_VALLEYVIEW(i915))
> + else if (display->is.VALLEYVIEW)
> vlv_fixup_mipi_sequences(display, panel);
> }
>
> @@ -2242,15 +2238,15 @@ static u8 map_ddc_pin(struct intel_display *display, u8 vbt_pin)
> const u8 *ddc_pin_map;
> int i, n_entries;
>
> - if (INTEL_PCH_TYPE(i915) >= PCH_MTL || IS_ALDERLAKE_P(i915)) {
> + if (INTEL_PCH_TYPE(i915) >= PCH_MTL || display->is.ALDERLAKE_P) {
> ddc_pin_map = adlp_ddc_pin_map;
> n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
> - } else if (IS_ALDERLAKE_S(i915)) {
> + } else if (display->is.ALDERLAKE_S) {
> ddc_pin_map = adls_ddc_pin_map;
> n_entries = ARRAY_SIZE(adls_ddc_pin_map);
> } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
> return vbt_pin;
> - } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
> + } else if (display->is.ROCKETLAKE && INTEL_PCH_TYPE(i915) == PCH_TGP) {
> ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
> n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
> } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(display) == 9) {
> @@ -2333,7 +2329,6 @@ static enum port __dvo_port_to_port(int n_ports, int n_dvo,
> static enum port dvo_port_to_port(struct intel_display *display,
> u8 dvo_port)
> {
> - struct drm_i915_private *i915 = to_i915(display->drm);
> /*
> * Each DDI port can have more than one value on the "DVO Port" field,
> * so look for all the possible values for each port.
> @@ -2390,12 +2385,12 @@ static enum port dvo_port_to_port(struct intel_display *display,
> ARRAY_SIZE(xelpd_port_mapping[0]),
> xelpd_port_mapping,
> dvo_port);
> - else if (IS_ALDERLAKE_S(i915))
> + else if (display->is.ALDERLAKE_S)
> return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
> ARRAY_SIZE(adls_port_mapping[0]),
> adls_port_mapping,
> dvo_port);
> - else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
> + else if (display->is.DG1 || display->is.ROCKETLAKE)
> return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
> ARRAY_SIZE(rkl_port_mapping[0]),
> rkl_port_mapping,
> @@ -2518,7 +2513,6 @@ static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata,
> enum port port)
> {
> struct intel_display *display = devdata->display;
> - struct drm_i915_private *i915 = to_i915(display->drm);
>
> if (!intel_bios_encoder_supports_dvi(devdata))
> return;
> @@ -2528,7 +2522,7 @@ static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata,
> * with a HSW VBT where the level shifter value goes
> * up to 11, whereas the BDW max is 9.
> */
> - if (IS_BROADWELL(i915) && devdata->child.hdmi_level_shifter_value > 9) {
> + if (display->is.BROADWELL && devdata->child.hdmi_level_shifter_value > 9) {
> drm_dbg_kms(display->drm,
> "Bogus port %c VBT HDMI level shift %d, adjusting to %d\n",
> port_name(port), devdata->child.hdmi_level_shifter_value, 9);
> @@ -2617,14 +2611,13 @@ int intel_bios_hdmi_max_tmds_clock(const struct intel_bios_encoder_data *devdata
>
> static bool is_port_valid(struct intel_display *display, enum port port)
> {
> - struct drm_i915_private *i915 = to_i915(display->drm);
> /*
> * On some ICL SKUs port F is not present, but broken VBTs mark
> * the port as present. Only try to initialize port F for the
> * SKUs that may actually have it.
> */
> - if (port == PORT_F && IS_ICELAKE(i915))
> - return IS_ICL_WITH_PORT_F(i915);
> + if (port == PORT_F && display->is.ICELAKE)
> + return display->is.ICELAKE_PORT_F;
>
> return true;
> }
> @@ -2906,7 +2899,7 @@ init_vbt_missing_defaults(struct intel_display *display)
> unsigned int ports = DISPLAY_RUNTIME_INFO(display)->port_mask;
> enum port port;
>
> - if (!HAS_DDI(display) && !IS_CHERRYVIEW(i915))
> + if (!HAS_DDI(display) && !display->is.CHERRYVIEW)
> return;
>
> for_each_port_masked(port, ports) {
> @@ -3671,17 +3664,16 @@ static const u8 direct_aux_ch_map[] = {
>
> static enum aux_ch map_aux_ch(struct intel_display *display, u8 aux_channel)
> {
> - struct drm_i915_private *i915 = to_i915(display->drm);
> const u8 *aux_ch_map;
> int i, n_entries;
>
> if (DISPLAY_VER(display) >= 13) {
> aux_ch_map = adlp_aux_ch_map;
> n_entries = ARRAY_SIZE(adlp_aux_ch_map);
> - } else if (IS_ALDERLAKE_S(i915)) {
> + } else if (display->is.ALDERLAKE_S) {
> aux_ch_map = adls_aux_ch_map;
> n_entries = ARRAY_SIZE(adls_aux_ch_map);
> - } else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) {
> + } else if (display->is.DG1 || display->is.ROCKETLAKE) {
> aux_ch_map = rkl_aux_ch_map;
> n_entries = ARRAY_SIZE(rkl_aux_ch_map);
> } else {
> --
> 2.39.2
>
