Add support for C20 phy for Type-C connections. C20 phy differs from C10 and hence we need to separately handle this case. v2: Fixes for C20 pll programming and hw readout Signed-off-by: Mika Kahola <mika.kahola@xxxxxxxxx> Anusha Srivatsa (1): drm/i915/mtl: Pin assignment for TypeC Gustavo Sousa (1): drm/i915/mtl: Define mask for DDI AUX interrupts Imre Deak (1): drm/i915/mtl: TypeC HPD live status query Mika Kahola (10): drm/i915/mtl: C20 PLL programming drm/i915/mtl: C20 HW readout drm/i915/mtl: Dump C20 pll hw state drm/i915/mtl: C20 port clock calculation drm/i915/mtl: Add voltage swing sequence for C20 drm/i915/mtl: For DP2.0 10G and 20G rates use MPLLA drm/i915/mtl: Enabling/disabling sequence Thunderbolt pll drm/i915/mtl: Readout Thunderbolt HW state drm/i915/mtl: Power up TCSS drm/i915/mtl: Enable TC ports drivers/gpu/drm/i915/display/intel_cx0_phy.c | 1137 ++++++++++++++++- drivers/gpu/drm/i915/display/intel_cx0_phy.h | 23 +- .../gpu/drm/i915/display/intel_cx0_phy_regs.h | 41 + drivers/gpu/drm/i915/display/intel_ddi.c | 25 +- .../drm/i915/display/intel_ddi_buf_trans.c | 53 +- drivers/gpu/drm/i915/display/intel_display.c | 7 +- .../drm/i915/display/intel_display_types.h | 16 +- drivers/gpu/drm/i915/display/intel_dp.c | 12 +- drivers/gpu/drm/i915/display/intel_dpll.c | 2 + drivers/gpu/drm/i915/display/intel_hdmi.c | 6 +- drivers/gpu/drm/i915/display/intel_hdmi.h | 1 + drivers/gpu/drm/i915/display/intel_tc.c | 255 +++- drivers/gpu/drm/i915/i915_irq.c | 5 +- 13 files changed, 1510 insertions(+), 73 deletions(-) -- 2.34.1