Series: | drm/i915/mtl: Add support for C20 phy (rev2) |
URL: | https://patchwork.freedesktop.org/series/116755/ |
State: | success |
Details: | https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116755v2/index.html |
CI Bug Log - changes from CI_DRM_13073 -> Patchwork_116755v2
Summary
SUCCESS
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116755v2/index.html
Participating hosts (39 -> 37)
Missing (2): fi-kbl-soraka fi-snb-2520m
Known issues
Here are the changes found in Patchwork_116755v2 that come from known issues:
IGT changes
Issues hit
-
igt@i915_selftest@live@reset:
-
igt@i915_selftest@live@slpc:
- bat-adln-1: NOTRUN -> DMESG-FAIL (i915#6997)
-
igt@kms_chamelium_hpd@common-hpd-after-suspend:
-
igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1:
Possible fixes
-
igt@i915_selftest@live@gt_lrc:
- bat-adln-1: INCOMPLETE (i915#4983 / i915#7609) -> PASS
-
igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1:
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
Build changes
- Linux: CI_DRM_13073 -> Patchwork_116755v2
CI-20190529: 20190529
CI_DRM_13073: d4602c57ac02d66526e4785b80c2e01dea122f33 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7275: c284bd66d7b416b4eaca456d6085b9180ad58058 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_116755v2: d4602c57ac02d66526e4785b80c2e01dea122f33 @ git://anongit.freedesktop.org/gfx-ci/linux
Linux commits
cfe10aa9f670 drm/i915/mtl: Enable TC ports
a76a271e840c drm/i915/mtl: Pin assignment for TypeC
af5b94a2f2cb drm/i915/mtl: TypeC HPD live status query
73e409d6e8e9 drm/i915/mtl: Power up TCSS
89031c1f2c58 drm/i915/mtl: Define mask for DDI AUX interrupts
01f19c8138fa drm/i915/mtl: Readout Thunderbolt HW state
6a8a44923092 drm/i915/mtl: Enabling/disabling sequence Thunderbolt pll
ed0bd3453efe drm/i915/mtl: For DP2.0 10G and 20G rates use MPLLA
ecd48801a943 drm/i915/mtl: Add voltage swing sequence for C20
5777f9bceb6a drm/i915/mtl: C20 port clock calculation
357247eb8025 drm/i915/mtl: Dump C20 pll hw state
dc0e2e2381d3 drm/i915/mtl: C20 HW readout
39ba77b93b8f drm/i915/mtl: C20 PLL programming