On Tue, 03 May 2022, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Do the DPLL computation before fastset checks. This should
> allow us to get rid of all that horrible fuzzy clock handling
> for fastsets. Who knows how many bugs there are caused by our
> state not actually matching what the hardware will generate.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 8d6cbfbaf20d..1a25addadc21 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2818,6 +2818,10 @@ static int intel_crtc_compute_config(struct intel_atomic_state *state,
> intel_atomic_get_new_crtc_state(state, crtc);
> int ret;
>
> + ret = intel_dpll_crtc_compute_clock(state, crtc);
> + if (ret)
> + return ret;
> +
> ret = intel_crtc_compute_pipe_src(crtc_state);
> if (ret)
> return ret;
> @@ -7783,10 +7787,6 @@ static int intel_atomic_check(struct drm_device *dev,
> if (intel_crtc_needs_modeset(new_crtc_state)) {
> any_ms = true;
>
> - ret = intel_dpll_crtc_compute_clock(state, crtc);
> - if (ret)
> - goto fail;
> -
> intel_release_shared_dplls(state, crtc);
> continue;
> }
--
Jani Nikula, Intel Open Source Graphics Center
